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s-8244 series www.sii-ic.com battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) ? seiko instruments inc., 2003-2010 rev.6.0 _00 seiko instruments inc. 1 the s-8244 series is used for secondary prot ection of lithium-ion batteries with from one to four cells, and incorporates a high-precision voltage detector circuit and a delay circuit. s hort-circuits between cells a ccommodate series connection of one to four cells. ? features (1) internal high-precision voltage detector circuit ? overcharge detection voltage range : 3.700 v to 4.500 v : accuracy of 25 mv (at + 25c) (at a 5 mv/step) accuracy of 50 mv (at ? 40c to + 85c) ? hysteresis : 5 types 0.38 0.1 v, 0.25 0.07 v, 0.13 0.04 v, 0.045 0.02 v, none (2) high withstand voltage device : absolute maximum rating : 26 v (3) wide operating voltage range : 3.6 v to 24 v (refers to the range in which the delay circuit can operate normally after overvoltage is detected) (4) delay time during detection : can be set by an external capacitor. (5) low current consumption : at 3.5 v for each cell : 3.0 a max. ( + 25c) at 2.3 v for each cell : 2.4 a max. ( + 25c) (6) output logic and form : 5 types cmos output active ?h? cmos output active ?l? pch open drain output active ?l? nch open drain output active ?h? nch open drain output active ?l? (cmos / nch open drain output fo r 0.045 v hysteresis models) (7) lead-free, sn 100%, halogen-free *1 *1. refer to ? ? product name structure ? for details. ? applications ? lithium ion rechargeable battery packs (secondary protection) ? packages ? snt-8a ? 8-pin msop ? tmsop-8
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 2 ? block diagram vcc ict vc2 vc1 - + co sense vc3 control logic overcharge detection comparator 4 overcharge detection comparator 3 overcharge detection comparator 2 overcharge detection comparator 1 reference voltage 4 reference voltage 3 reference voltage 2 reference voltage 1 vss - + - + - + overcharge detection delay circuit remark in the case of nch open-drain output, only the nc h transistor will be connected to the co pin. in the case of pch open-drain output, only the pc h transistor will be connected to the co pin. figure 1
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 3 ? product name structure 1. product name (1) snt-8a s-8244a xx ph - xxx tf x environmental code u: lead-free (sn 100%), halogen-free g: lead-free (for details, please contact our sales office) ic direction of tape specifications *1 product name (abbreviation) *2 package abbreviation ph: snt-8a serial code sequentially set from aa to zz *1. refer to the tape specificat ions at the end of this book. *2. refer to the ? 3. product name list ?. (2) 8-pin msop s-8244a xx fn - xxx t2 x environmental code s: lead-free, halogen-free g: lead-free (for details, please contact our sales office) ic direction of tape specifications *1 product name (abbreviation) *2 package abbreviation fn: 8-pin msop serial code sequentially set from aa to zz *1. refer to the tape specificat ions at the end of this book. *2. refer to the ? 3. product name list ?.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 4 (3) tmsop-8 s-8244a xx fm - xxx t2 u environmental code u: lead-free (sn 100%), halogen-free ic direction of tape specifications *1 product name (abbreviation) *2 package abbreviation fm: tmsop-8 serial code sequentially set from aa to zz *1. refer to the tape specificat ions at the end of this book. *2. refer to the ? 3. product name list ?. 2. packages drawing code package name package tape reel land snt-8a ph008-a-p-sd ph008-a-c-sd ph008-a-r-sd ph008-a-l-sd 8-pin msop fn008-a-p-sd fn008-a-c-sd fn008-a-r-sd ? tmsop-8 fm008-a-p-sd fm008-a-c-sd fm008-a-r-sd ? 3. product name list (1) snt-8a table 1 product name/item overcharge detection voltage [v cu ] overcharge hysteresis voltage [v cd ] output form s-8244aaaph-ceatfx 4.450 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aabph-cebtfx 4.200 0.025 v 0 v nch open drain active ?h? s-8244aadph-cedtfx 4.200 0.025 v 0 v pch open drain active ?l? s-8244aafph-ceftfx 4.350 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aagph-cegtfx 4.450 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aajph-cejtfx 4.500 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aasph-cestfx 4.350 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aavph-cevtfx 4.275 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aayph-ceytfx 4.300 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aazph-ceztfx 4.280 0.025 v 0.25 0.07 v cmos output active ?h? s-8244abbph-cfbtfx 4.380 0.025 v 0.25 0.07 v cmos output active ?h? s-8244abdph-cfdtfx 4.150 0.025 v 0.045 0.02 v cmos output active ?l? s-8244abeph-cfetfx 4.215 0.025 v 0 v nch open drain active ?l? s-8244abhph-cfhtfx 4.280 0.025 v 0.045 0.02 v cmos output active ?h? remark 1. please contact our sales office for the products with the detection voltage value other than those specified above. 2. x : g or u 3. please select products of environmental code = u for sn 100%, halogen-free products.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 5 (2) 8-pin msop table 2 product name/item overcharge detection voltage [v cu ] overcharge hysteresis voltage [v cd ] output form s-8244aaafn-ceat2z 4.450 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aabfn-cebt2z 4.200 0.025 v 0 v nch open drain active ?h? s-8244aacfn-cect2z 4.115 0.025 v 0.13 0.04 v cmos output active ?h? s-8244aadfn-cedt2z 4.200 0.025 v 0 v pch open drain active ?l? s-8244aaefn-ceet2z 4.225 0.025 v 0 v nch open drain active ?h? s-8244aaffn-ceft2z 4.350 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aagfn-cegt2z 4.450 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aahfn-ceht2z 4.300 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaifn-ceit2z 4.400 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aajfn-cejt2z 4.500 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aakfn-cekt2z 4.475 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aalfn-celt2z 4.350 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aamfn-cemt2z 4.300 0.025 v 0.25 0.07 v cmos output active ?l? s-8244aanfn-cent2z 4.150 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaofn-ceot2z 4.250 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aapfn-cept2z 4.050 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaqfn-ceqt2z 4.150 0.025 v 0 v nch open drain active ?h? s-8244aarfn-cert2z 4.300 0.025 v 0.25 0.07 v nch open drain active ?h? s-8244aatfn-cett2z 4.200 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaufn-ceut2z 3.825 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aawfn-cewt2z 4.500 0.025 v 0.38 0.1 v cmos output active ?l? s-8244aaxfn-cext2z 4.025 0.025 v 0.25 0.07 v cmos output active ?h? s-8244abafn-cfat2z 4.220 0.025 v 0.045 0.02 v cmos output active ?h? s-8244abgfn-cfgt2s 4.225 0.025 v 0.045 0.02 v nch open drain active ?l? s-8244abifn-cfit2s 4.100 0.025 v 0 v nch open drain active ?l? s-8244abjfn-cfjt2s 4.325 0.025 v 0.045 0.02 v nch open drain active ?l? s-8244abkfn-cfkt2s 4.175 0.025 v 0 v nch open drain active ?l? remark 1. please contact our sales office for the products with the detection voltage value other than those specified above. 2. z: g or s 3. please select products of environmental code = u for sn 100%, halogen-free products. (3) tmsop-8 table 3 product name/item overcharge detection voltage [v cu ] overcharge hysteresis voltage [v cd ] output form s-8244aaafm-ceat2u 4.450 0.025 v 0.38 0.1 v cmos output active ?h? s-8244aaffm-ceft2u 4.350 0.025 v 0.045 0.02 v cmos output active ?h? s-8244aapfm-cept2u 4.050 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaufm-ceut2u 3.825 0.025 v 0.25 0.07 v cmos output active ?h? s-8244aaxfm-cext2u 4.025 0.025 v 0.25 0.07 v cmos output active ?h? s-8244abgfm-cfgt2u 4.225 0.025 v 0.045 0.02 v nch open drain active ?l? s-8244abifm-cfit2u 4.100 0.025 v 0 v nch open drain active ?l? s-8244abjfm-cfjt2u 4.325 0.025 v 0.045 0.02 v nch open drain active ?l? s-8244abkfm-cfkt2u 4.175 0.025 v 0 v nch open drain active ?l? remark please contact our sales office for the products with t he detection voltage value other than those spec ified above.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 6 ? pin configurations table 4 pin no. symbol description 1 co fet gate connection pin for charge control 2 ict capacitor connection pin for overcharge detection delay 3 vss input pin for negative power supply, connection pin for battery 4?s negative voltage 4 vc3 connection pin for battery 3?s negative voltage, connection pin for battery 4?s positive voltage 5 vc2 connection pin for battery 2?s negative voltage, connection pin for battery 3?s positive voltage 6 vc1 connection pin for battery 1?s negative voltage, connection pin for battery 2?s positive voltage snt-8a top view 1 2 3 4 co ict vss vc3 6 8 7 5 vcc sense vc1 vc2 7 sense connection pin for battery 1?s positive voltage figure 2 8 vcc input pin for positive power supply table 5 pin no. symbol description 1 vcc input pin for positive power supply 2 sense connection pin for battery 1?s positive voltage 3 vc1 connection pin for battery 1?s negative voltage, connection pin for battery 2?s positive voltage 4 vc2 connection pin for battery 2?s negative voltage, connection pin for battery 3?s positive voltage 5 vc3 connection pin for battery 3?s negative voltage, connection pin for battery 4?s positive voltage 6 vss input pin for negative power supply, connection pin for battery 4?s negative voltage 8-pin msop top view vcc sense vc1 vc2 co ict vss vc3 3 2 4 1 8 6 7 5 7 ict capacitor connection pin for overcharge detection delay figure 3 8 co fet gate connection pin for charge control table 6 pin no. symbol description 1 vcc input pin for positive power supply 2 sense connection pin for battery 1?s positive voltage 3 vc1 connection pin for battery 1?s negative voltage, connection pin for battery 2?s positive voltage 4 vc2 connection pin for battery 2?s negative voltage, connection pin for battery 3?s positive voltage 5 vc3 connection pin for battery 3?s negative voltage, connection pin for battery 4?s positive voltage 6 vss input pin for negative power supply, connection pin for battery 4?s negative voltage 3 2 4 1 8 6 7 5 co ict vss vc3 vcc sense vc2 vc1 tmsop-8 top view 7 ict capacitor connection pin for overcharge detection delay figure 4 8 co fet gate connection pin for charge control
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 7 ? absolute maximum ratings table 7 (ta = 25 c unless otherwise specified ) item symbol applied pin rating unit input voltage between vcc and vss v ds vcc v ss ? 0.3 to v ss + 26 v delay capacitor connection pin voltage v ict ict v ss ? 0.3 to v cc + 0.3 v input pin voltage v in sense, vc1, vc2, vc3 v ss ? 0.3 to v cc + 0.3 v (cmos output) v ss ? 0.3 to v cc + 0.3 v (nch open drain output) v ss ? 0.3 to 26 v co output pin voltage (pch open drain output) v co co v cc ? 26 to v cc + 0.3 v snt-8a 450 *1 mw 8-pin msop 500 *1 mw power dissipation tmsop-8 p d ? 650 *1 mw operating ambient temperature t opr ? ? 40 to + 85 c storage temperature t stg ? ? 40 to + 125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) name : jedec standard51-7 caution the absolute maximum ra tings are rated values exceeding whic h the product could suffer physical damage. these values must therefore not be exceeded under any conditions. 0 50 100 150 ambient temperature (ta) [ c] 700 600 500 400 300 200 100 0 power dissipation (p d ) [mw] tmsop-8 8-pin msop snt-8a figure 5 power dissipation of package (when mounted on board)
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 8 ? electrical characteristics table 8 (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test conditions test circuit detection voltage overcharge detection voltage 1 *1 v cu1 3.7 v to 4.5 v adjustment v cu1 ? 0.025 v cu1 v cu1 + 0.025 v 1 1 overcharge detection voltage 2 *1 v cu2 3.7 v to 4.5 v adjustment v cu2 ? 0.025 v cu2 v cu2 + 0.025 v 2 1 overcharge detection voltage 3 *1 v cu3 3.7 v to 4.5 v adjustment v cu3 ? 0.025 v cu3 v cu3 + 0.025 v 3 1 overcharge detection voltage 4 *1 v cu4 3.7 v to 4.5 v adjustment v cu4 ? 0.025 v cu4 v cu4 + 0.025 v 4 1 overcharge hysteresis voltage 1 *2 v cd1 ? 0.28 0.38 0.48 v 1 1 overcharge hysteresis voltage 2 *2 v cd2 ? 0.28 0.38 0.48 v 2 1 overcharge hysteresis voltage 3 *2 v cd3 ? 0.28 0.38 0.48 v 3 1 overcharge hysteresis voltage 4 *2 v cd4 ? 0.28 0.38 0.48 v 4 1 detection voltage temperature coefficient *3 t coe ta = ? 40 c to + 85 c *4 ? 0.4 0.0 + 0.4 mv/ c ? ? delay time overcharge detection delay time t cu c = 0.1 f 1.0 1.5 2.0 s 5 2 operating voltage operating voltage between vcc and vss *5 v dsop ? 3.6 ? 24 v ? ? current consumption current consumption during normal operation i ope v1 = v2 = v3 = v4 = 3.5 v ? 1.5 3.0 a 6 3 current consumption at power down i pdn v1 = v2 = v3 = v4 = 2.3 v ? 1.2 2.4 a 6 3 vc1 sink current i vc1 v1 = v2 = v3 = v4 = 3.5 v ? 0.3 ? 0.3 a 6 3 vc2 sink current i vc2 v1 = v2 = v3 = v4 = 3.5 v ? 0.3 ? 0.3 a 6 3 vc3 sink current i vc3 v1 = v2 = v3 = v4 = 3.5 v ? 0.3 ? 0.3 a 6 3 output voltage *6 co ?h? voltage v co(h) at i out = 10 a v cc ? 0.05 ? ? v 7 4 co ?l? voltage v co(l) at i out = 10 a ? ? v ss + 0.05 v 7 4 *1. 50 mv when ta = ? 40 c to + 85 c. *2. 0.25 0.07 v, 0.13 0.04 v, 0.045 0.02 v except for 0.38 v hysteresis models. *3. overcharge detection voltage or overcharge hysteresis voltage. *4. since products are not screened at high and lo w temperature, the specification fo r this temperature range is guaranteed by design, not tested in production. *5. after detecting the overcharge, the delay circuit operates normally in the range of operating voltage. *6. output logic and cmos or open drain output can be selected.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 9 ? test circuits (1) test condition 1, test circuit 1 set switches 1 and 2 to off for cmos output product. set switch 1 to on and switch 2 to off for nch open drain product. set switch 1 to off and switch 2 to on for pch open drain product. ? product with cmos output active ?h?, nch open drain output active ?h? the overcharge detection voltage 1 (v cu1 ) is a voltage at v1; when the co pin?s voltage is set to ?h? by increasing v1 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v1?s voltage to set co = ?l?, and the difference of this v1?s voltage and v cu1 is the overcharge hysteresis voltage 1 (v cd1 ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? the overcharge detection voltage 1 (v cu1 ) is a voltage at v1; when the co pin?s voltage is set to ?l? by increasing v1 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v1?s voltage to set co = ?h?, and the difference of this v1?s voltage and v cu1 is the overcharge hysteresis voltage 1 (v cd1 ). (2) test condition 2, test circuit 1 set switches 1 and 2 to off for cmos output product. set switch 1 to on and switch 2 to off for nch open drain product. set switch 1 to off and switch 2 to on for pch open drain product. ? product with cmos output active ?h?, nch open drain output active ?h? the overcharge detection voltage 2 (v cu2 ) is a voltage at v2; when the co pin?s voltage is set to ?h? by increasing v2 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v2?s voltage to set co = ?l?, and the difference of this v2?s voltage and v cu2 is the overcharge hysteresis voltage 2 (v cd2 ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? the overcharge detection voltage 2 (v cu2 ) is a voltage at v2; when the co pin?s voltage is set to ?l? by increasing v2 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v2?s voltage to set co = ?h?, and the difference of this v2?s voltage and v cu2 is the overcharge hysteresis voltage 2 (v cd2 ). (3) test condition 3, test circuit 1 set switches 1 and 2 to off for cmos output product. set switch 1 to on and switch 2 to off for nch open drain product. set switch 1 to off and switch 2 to on for pch open drain product. ? product with cmos output active ?h?, nch open drain output active ?h? the overcharge detection voltage 3 (v cu3 ) is a voltage at v3; when the co pin?s voltage is set to ?h? by increasing v3 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v3?s voltage to set co = ?l?, and the difference of this v3?s voltage and v cu3 is the overcharge hysteresis voltage 3 (v cd3 ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? the overcharge detection voltage 3 (v cu3 ) is a voltage at v3; when the co pin?s voltage is set to ?l? by increasing v3 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v3?s voltage to set co = ?h?, and the difference of this v3?s voltage and v cu3 is the overcharge hysteresis voltage 3 (v cd3 ).
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 10 (4) test condition 4, test circuit 1 set switches 1 and 2 to off for cmos output product. set switch 1 to on and switch 2 to off for nch open drain product. set switch 1 to off and switch 2 to on for pch open drain product. ? product with cmos output active ?h?, nch open drain output active ?h? the overcharge detection voltage 4 (v cu4 ) is a voltage at v4; when the co pin?s voltage is set to ?h? by increasing v4 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v4?s voltage to set co = ?l?, and the difference of this v4?s voltage and v cu4 is the overcharge hysteresis voltage 4 (v cd4 ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? the overcharge detection voltage 4 (v cu4 ) is a voltage at v4; when the co pin?s voltage is set to ?l? by increasing v4 gradually, after setting v1 = v2 = v3 = v4 = 3.5 v. after that, gradually decreasing v4?s voltage to set co = ?h?, and the difference of this v4?s voltage and v cu4 is the overcharge hysteresis voltage 4 (v cd4 ). (5) test condition 5, test circuit 2 set switches 1 and 2 to off for cmos output product. set switch 1 to on and switch 2 to off for nch open drain product. set switch 1 to off and switch 2 to on for pch open drain product. ? product with cmos output active ?h?, nch open drain output active ?h? rise v1 to 4.7 v momentarily within 10 s after setting v1 = v2 = v3 = v4 = 3.5 v. the period from v1 having reached 4.7 v to co = ?h? is the overcharge detection delay time (t cu ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? rise v1 to 4.7 v momentarily within 10 s after setting v1 = v2 = v3 = v4 = 3.5 v. the period from v1 having reached 4.7 v to co = ?l? is the overcharge detection delay time (t cu ). (6) test condition 6, test circuit 3 measure current consumption (i1) setting v1 = v2 = v3 = v4 = 2.3 v. this i1 is current consumption at power-down (i pdn ). measure current consumption (i1) setting v1 = v2 = v3 = v4 = 3.5 v. this i1 is current consumption during normal operation (i ope ), i2 is the vc1 sink current (i vc1 ), i3 is the vc2 sink current (i vc2 ), i4 is the vc3 sink current (i vc3 ).
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 11 (7) test condition 7, test circuit 4 measure setting switch 1 to off and switch 2 to on. ? product with cmos output active ?h? decrease v6 from v cc gradually after setting v1 = v2 = v3 = v4 = 4.6 v, the v6?s voltage when flowing i2 = ? 10 a is the v co(h) voltage. increase v6 from 0 v gradually after setting v1 = v2 = v3 = v4 = 3.5 v, the v6?s voltage when flowing i2 = 10 a is the v co(l) voltage. ? product with cmos output active ?l? decrease v6 from v cc gradually after setting v1 = v2 = v3 = v4 = 3.5 v, the v6?s voltage when flowing i2 = ? 10 a is the v co(h) voltage. increase v6 from 0 v gradually after setting v1 = v2 = v3 = v4 = 4.6 v, the v6?s voltage when flowing i2 = 10 a is the v co(l) voltage. ? product with pch open drain output active ?l? decrease v6 from v cc gradually after setting v1 = v2 = v3 = v4 = 3.5 v, the v6?s voltage when flowing i2 = ? 10 a is the v co(h) voltage. ? product with nch open drain output active ?h? increase v6 from 0 v gradually after setting v1 = v2 = v3 = v4 = 3.5 v, the v6?s voltage when flowing i2 = 10 a is the v co(l) voltage. ? product with nch open drain output active ?l? increase v6 from 0 v gradually after setting v1 = v2 = v3 = v4 = 4.6 v, the v6?s voltage when flowing i2 = 10 a is the v co(l) voltage.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 12 10 m 10 m v1 v2 v3 v4 sw2 sw1 s-8244 vcc sense vc1 vc2 co ict vss vc3 v 10 m 10 m v1 v2 v3 v4 sw2 sw1 s-8244 vcc sense vc1 vc2 co ict vss vc3 0.1 f v test circuit 1 test circuit 2 v1 v2 v3 v4 s-8244 vcc sense vc1 vc2 co ict vss vc3 i1 i2 i3 i4 v5 v1 v2 v3 v4 sw2 sw1 s-8244 vcc sense vc1 vc2 co ict vss vc3 v6 i2 i1 v test circuit 3 test circuit 4 figure 6
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 13 ? operation remark refer to ? ? battery protection ic connection example ?. 1. overcharge detection ? product with cmos output active ?h?, nch open drain output active ?h? during charging in the normal status, any of batte ry voltages exceeds overcharge detection voltage (v cu ), and this status is maintained for overcharge detection delay time (t cu ) or longer, co gets ?h?. this is overcharge status. connecting an fet to the co pin enables charge-control and the second protect. in this case, the ic maintains the overcharge status until all battery voltages decreases, to the overcharge hysteresis voltage (v cd ) from the overcharge detection voltage (v cu ). ? product with cmos output active ?l?, nch open drain output active ?l?, pch open drain output active ?l? during charging in the normal status, any of batte ry voltages exceeds overcharge detection voltage (v cu ), and this status is maintained for overcharge detection delay time (t cu ) or longer, co gets ?l?. this is overcharge status. connecting an fet to the co pin enables charge-control and the second protect. in this case, the ic maintains the overcharge status until all battery voltages decreases, to the overcharge hysteresis voltage (v cd ) from the overcharge detection voltage (v cu ). 2. delay circuit the delay circuit rapidly charges the capacitor connected to the delay capacit or connection pin up to a specified voltage when the voltage of one of the batteries exceeds the overcharge detection voltage (v cu ). then, the delay circuit gradually discharges the capacitor at 100 na and inverts the co output when the voltage at the delay capacitor connection pin goes below a specified level. overcharge detection delay time (t cu ) varies depending upon the external capacitor. each delay time is calculated using the following equation. min. typ. max. t cu [s] = delay coefficient (10, 15, 20) c ict [ f] because the delay capacitor is rapidl y charged, the smaller the capacitance, the larger the difference between the maximum voltage and the specified value of delay capacitor pin (ict pin). th is will cause a deviation between the calculated delay time and the resultant delay time. also, delay time is internally set in this ic to prevent the co output from inverting until the charge to delay capacitor pin is reached to the specified voltage. if large capacitance is used, output may be enabled without delay time because charge is disabled within the internal delay time. please note that the maximum capacitance connected to the delay capacitor pin (ict pin) is 1 f.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 14 ? timing chart v cu battery voltage v ss co pin voltage v cc co pin voltage v ss delay v ss ict pin voltage v cc cmos output active ?h? and nch open drain output active ?h? products cmos output active ?l? , pch open drain output active ?l? and nch open drain output active ?l? products v cd v1 battery v2 battery v3 battery v4 battery v ss figure 7
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 15 ? battery protection ic connection example (1) connection example 1 sc protector eb ? c vcc c ict c1 c2 c3 c4 eb + r1 r2 r3 r4 bat1 bat2 bat3 bat4 r vcc fet sense vc1 vc2 vc3 vss vcc ict co figure 8 table 9 constants for external components 1 symbol min. typ. max. unit r1 to r4 0 1 k 10 k c1 to c4 0 0.1 1 f r vcc 0 100 1 k c vcc 0 0.1 1 f c ict 0 0.1 1 f caution1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the exampl e of connection shown a bove and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. 3. in the case of nch open drain output, pull up co pin by external resistor. [for sc protector, contact] sony chemical & information device corporation, electronic device marketing & sales dept. gate city osaki east tower 8f, 1-11-2 osaki, shinagawa-ku, tokyo, 141-0032 japan tel +81-3-5435-3943 contact us: http://www.sonycid.jp/en/
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 16 (2) connection example 2 sc protector eb ? c vcc c ict c1 c2 c3 c4 eb + r1 r2 r3 r4 bat1 bat2 bat3 bat4 r vcc fet sense vc1 vc2 vc3 vss vcc ict co figure 9 table 10 constants for external components 2 symbol min. typ. max. unit r1 to r4 0 1 k 10 k c1 to c4 0 0.1 1 f r vcc 0 100 1 k c vcc 0 0.1 1 f c ict 0 0.1 1 f caution1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the exampl e of connection shown a bove and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. 3. in the case of nch open drain output, pull up co pin by external resistor.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 17 (3) connection example 3 (for 3-cells) sc protector eb ? c vcc c ict c1 c2 c3 eb + r1 r2 r3 bat1 bat2 bat3 r vcc fet sense vc1 vc2 vc3 vss vcc ict co figure 10 table 11 constants for external components 3 symbol min. typ. max. unit r1 to r3 0 1 k 10 k c1 to c3 0 0.1 1 f r vcc 0 100 1 k c vcc 0 0.1 1 f c ict 0 0.1 1 f caution1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the exampl e of connection shown a bove and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. 3. in the case of nch open drain output, pull up co pin by external resistor.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 18 (4) connection example 4 (for 2-cells) sc protector eb ? c vcc c ict c1 c2 eb + r1 r2 bat1 bat2 r vcc fet sense vc1 vc2 vc3 vss vcc ict co figure 11 table 12 constants for external components 4 symbol min. typ. max. unit r1, r2 0 1 k 10 k c1, c2 0 0.1 1 f r vcc 0 100 1 k c vcc 0 0.1 1 f c ict 0 0.1 1 f caution1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the exampl e of connection shown a bove and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. 3. in the case of nch open drain output, pull up co pin by external resistor.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 19 (5) connection example 5 (for 1-cell) eb? c vcc c ict c1 eb+ r1 bat1 r vcc fet sense vc1 vc2 vc3 vss vcc ict co sc protector figure 12 table 13 constants for external components 5 symbol min. typ. max. unit r1 0 1 k 10 k c1 0 0.1 1 f r vcc 0 100 1 k c vcc 0 0.1 1 f c ict 0 0.1 1 f caution1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the exampl e of connection shown a bove and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. 3. in the case of nch open drain output, pull up co pin by external resistor.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) s-8244 series rev.6.0 _00 seiko instruments inc. 20 ? precautions ? this ic charges the delay capacitor through the delay capacitor pin (ict pin) immediately when the voltage of one of batteries v1 to v4 reaches the overc harge voltage. therefore, setting the resistor connected to the vcc pin to any value greater than the recommended level causes a reducti on in the ic power supply voltage because of charge current of the delay capacitor. this may lead to a malfunction. set up the resistor not to exceed the typical value. if you change the resistance, please consult us. ? do not connect any of overc harged batteries. even if only one overcharged battery is connected to this ic, the ic detects overcharge, then charge current flows to the delay capacitor through the parasitic diode between pins where the battery is not connected yet. this may lead to a malfunction. please perform sufficient evaluation in the case of use. depending on an application circuit, even when the fault charge battery is not contained, the connection turn of a battery may be restricted in order to prevent the output of co detection pulse at the time of battery connection. v cu battery voltage setting voltage v cc co pin voltage v ss v ss ict pin voltage cmos output active ?h? and nch open drain output active ?h? products v cd v1 battery v2 battery v3 battery v4 battery internal delay delay c ict low c ict high c ict low c ict high v ss ? in this ic, the output logic of the co pin is inverted after several milliseconds of internal delay if this ic is under the overcharge condition even ict pin is either ?v ss ? short circuit,? ?v dd ? short circuit? or ?open? status. ? any position from v1 to v4 can be used when applying this ic for a one to three-cell battery. however, be sure to short circuit between pins not in use (sense ? vc1, vc1 ? vc2, vc2 ? vc3, or vc3 ? vss). ? the application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. ? do not apply an electrostatic discharge to this ic that ex ceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any and all disputes arisi ng out of or in connection wi th any infringement of the products including this ic upon patents owned by a third party.
battery protection ic for 1-serial to 4-serial-cell pack (secondary protection) rev.6.0 _00 s-8244 series seiko instruments inc. 21 ? characteristics (typical data) 1. detection voltage vs. temperature overcharge detection voltage vs. temperature overcharge release voltage vs. temperature 4.35 4.45 4.55 ? 40 ? 20 0 20 40 60 80 100 ta [c] v cu [v] s-8244aaafn v cu = 4.45 v 3.97 4.07 4.17 ? 40 ? 20 0 20 40 60 80 100 ta [c] v cu ? v cd [v] s-8244aaafn v cd = 0.38 v 2. current consumption vs. temperature current consumption during normal operation vs. temperature current consumption at power down vs. temperature i ope [ a] 0 1 2 3 ? 40 ?20 0 20 40 60 80 100 s-8244aaafn v cc = 14.0 v ta [c] 0 1 2 3 ? 40 ? 20 0 20 40 60 80 100 i pdn [ a] s-8244aaafn v cc = 9.2 v ta [c] 3. delay time vs. temperature overcharge detection delay time vs. temperature 0 1 2 3 ? 40 ?20 0 20 40 60 80 100 t cu [s] s-8244aaafn v cc = 15.2 v ta [c] caution please design all applications of the s-8244 series with safety in mind.

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www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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